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Organization

George Mason University
Presenters
Xiang Chen
Weiwen Jiang
Sai Manoj Pudukotai Dinakarrao
Avesta Sasan
Yi Sheng
Zirui Xu
Fuxun Yu
Yongbo Yu
Session Chairs
Xiang Chen
Weiwen Jiang
Presentations
Research Manuscript
A Length Adaptive Algorithm-Hardware Co-design of Transformer on FPGA Through Sparse Attention and Dynamic Pipelining
Design
AI/ML Design: System and Platform
Research Manuscript
LOCK & ROLL: Deep-Learning Power Side-Channel Attack Mitigation using Emerging Reconfigurable Devices and Logic Locking
Security
Hardware Security: Primitives, Architecture, Design & Test
Networking Reception
Work-in-Progress Poster
Powering Multi-Task Federated Learning with Competitive GPU Resource Sharing
Tutorial
Scalable Design-Program-Compilation Optimizations for Quantum Algorithms: Using Quantum Neural Network as a Case Study
AI
Design
Research Manuscript
Silicon Validation of LUT-based Logic-Locked IP Cores
EDA
Design Verification and Validation
Research Manuscript
The Larger The Fairer? Small Neural Networks Can Achieve Fairness for Edge Devices
Design
AI/ML Design: System and Platform
Sessions
Research Manuscript
Faster and Stronger: AI Acceleration and Resilience
Design
AI/ML Design: System and Platform
Research Manuscript
Be Water: Adaptive AI for Dynamic Systems
Design
AI/ML Design: System and Platform