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Presentation

NOVEL DESIGN OF REAL TIME CLOCK MACRO FOR ADVANCED FINFET TECHNOLOGY NODES
TimeWednesday, July 13th1:45pm - 2pm PDT
Location2008, Level 2
Event Type
Back-End Design
Engineering Tracks
Topics
Back-End Design
DescriptionThe Real Time Clock (RTC) IP is used in almost all electronic systems to maintain computer's time. The IP consists of a macro called ARTC which primarily has digital logic in it and a macro called PRTC having primarily analog logic in it. The ARTC macro further comprises of SAPR (Synthesis - Auto - Place and Route) logic built with ARTC standard cells. An important spec for the IP and thereby for each macro is the current consumption in the "G3 state" when the SoC supply is off and the IP is running on the battery voltage. To meet the spec on the current consumption in G3 state in ARTC, the design of the ARTC standard cells is critical. In advanced technology nodes because of inherent technology limitations and MOS behavior, the topologies used in the previous technology nodes don't work. This paper talks about a novel architecture for the design of this low power standard cell library in advanced technology nodes using which various standard cells were designed and current specs were met.