An area and test-time efficient in-field memory test framework with tunable guard bands
TimeWednesday, July 13th2:45pm - 3pm PDT
Location2008, Level 2
Event Type
Back-End Design
Engineering Tracks
Back-End Design
DescriptionAutomotive SOCs have very high-quality targets with strict functional safety requirements. In-field test is one such critical requirement with hard test time limits to guarantee system response time. With increasing embedded memory content in automotive SOCs, this submission presents an in-field memory test framework that supports power-safe parallel self-tests with a non-destructive memory signature computation together with software-tunable performance and robustness guard bands.