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Presentation

Efficient read/write turn-around policy of LPDDR5 memory controller
TimeTuesday, July 12th5pm - 6pm PDT
LocationLevel 2 Exhibit Hall
Event Type
Engineering Track Poster
Engineering Tracks
Topics
AI
Back-End Design
Cloud
Embedded Systems
Front-End Design
IP
DescriptionIn mobile SoC, high bandwidth utilization is key to low memory power consumption. Bandwidth-oriented memory scheduling is preferred, and one of its schemes is read/write burst scheduling in order to avoid frequent read/write turn-around. The scheme works well with LPDDR4, but it suffers from lower utilization with longer write recovery time in LPDDR5.