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Presentation

Porting software to hardware using XLS/DSLX
TimeWednesday, July 13th5pm - 6pm PDT
LocationLevel 2 Exhibit Hall
Event Type
Engineering Track Poster
Engineering Tracks
Topics
AI
Back-End Design
Cloud
Embedded Systems
Front-End Design
IP
DescriptionDSLX is a dataflow-oriented functional language used to build hardware that can also run effectively as host software.

DSLX’s syntax resembles Rust, while being an immutable expression-based dataflow DSL and adding hardware-oriented features like arbitrary bitwidths.

Using the XLS (Accelerated HW Synthesis) toolchain, DSLX can target to XLS IR intermediate format to enable development flows for FPGAs and ASICs (thru Verilog conversation) or native-speed execution (thru LLVM-based JIT compilation).

In this presentation, we go step-by-step thru the process of “Porting software to hardware” by rewriting a C routine in DSLX and showing how to integrate the XLS toolchain in typical FPGA and ASIC opensource flows.