In-design IR drop convergence with Ansys RHSC and SNPS fusion compiler
TimeTuesday, July 12th5pm - 6pm PDT
LocationLevel 2 Exhibit Hall
Event Type
Engineering Track Poster
Engineering Tracks
Back-End Design
Embedded Systems
Front-End Design
DescriptionIn a typical design, execution signoff IR drop convergence happens towards the end of the design cycle as it is heavily dependent on the quality of design for successful closure. Time to result is critical. Hence, it is important to invent ways to left-shift power integrity solutions and capabilities in the design cycle saving multiple iterative loop time thus reducing design cycle closure. The Synopsys Redhawk-SC Fusion in-design capability addresses this very concern and helps in converging on IR drop earlier in the design cycle during APR construction phase. The flow accelerates the block level closure saving days/weeks resulting in better design PPA driven by left-shift in IR drop profile. In order to accelerate the IR drop convergence earlier in the design cycle, we adopted a three-pronged approach by enabling dynamic power shaping (DPS), IR aware placement (IRAP) and power grid augmentation (PGA). These three different features are deployed at different stages of the flow for optimal throughput.