Minimize Power Consumption with A Novel Power ECO Flow
TimeMonday, July 11th4:50pm - 5pm PDT
LocationDAC Pavilion, Level 2 Exhibit Hall
Event Type
DAC Pavilion Gladiator Arena Poster Battle
Engineering Track Poster
Engineering Tracks
Back-End Design
Embedded Systems
Front-End Design
DescriptionPower ECO is an important step for power recovery at the last design step. This presentation introduced a novel parametrized optimization framework for total power optimization considering timing, area, and DRC violations. For the implementation of the proposed ECO algorithm, extensive efforts for runtime optimization has been taken to reduce the ECO Turn Around Time (TAT) overhead. To achieve further power reduction, a hybrid power ECO flow is proposed to combine the proposed ECO flow with the commercial ECO flow using PrimeTime. Finally, the proposed ECO flow has been validated with industrial design testcases. Up to 13.8% power reduction has been observed with the proposed power ECO solution. The overheads for timing/DRC violations and runtime of the proposed solution were also well optimized.