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Presentation

Path-Finding Through Variability-Aware DTCO-Flow
TimeWednesday, July 13th5pm - 6pm PDT
LocationLevel 2 Exhibit Hall
Event Type
Engineering Track Poster
Engineering Tracks
Topics
AI
Back-End Design
Cloud
Embedded Systems
Front-End Design
IP
DescriptionTechnology computer aided design (TCAD) design technology co-optimization (DTCO) is most accurate and flexible for path-finding exploration, however also limited by turn-around times (TAT).

In this work, we present a fully integrated TCAD enabled SPICE DTCO flow with high accuracy and flexibility but at a fraction of the computational costs as compared to TCAD.

The approach is used to study nano-sheet SRAM cells. KPIs are evaluated across the full design space showing the importance of balancing of n/pMOS widths. The effect of variability is captured at TCAD level.

Our flow enables path-finding simulation studies and pre-Silicon PDK building on novel devices (NS, Fork-sheet, etc.), architectures (CFET, VFET) and materials for future technology nodes.