RDC(Reset Domain Crossing) Sign-off Methodology on Designs with Complex Reset Structures
TimeMonday, July 11th11:15am - 11:30am PDT
Location2010, Level 2
DescriptionAs the complexity of reset structure in modern chips has increased significantly, reset domain crossing (RDC) analysis has become a mandatory step of RTL sign-off as well. Dynamic simulation based on reset scenario and static verification based on reset waveform have been used as conventional RDC verification, however both means are not suitable for designs with complex reset structures. It is because describing over hundreds of resets with timing waveform or creating test scenarios for RDC verification can be manually intensive and error prone. This paper shows RDC sign-off methodology with 3 key factors, handling multiple resets, reset propagation and flexible object-aware violation control to overcome these challenges.