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Presentation

Learning-based Power Modeling for Versal AI Engine
TimeWednesday, July 13th2:45pm - 3pm PDT
Location2010, Level 2
Event Type
Engineering Tracks
Front-End Design
Topics
Front-End Design
DescriptionVersal AI Engine is multi-core VLIW architecture targeted for compute-intensive applications such as 5G cellular and AI ML workload.
We developed an Instruction-based Power Model (IPM) with multivariable linear regression model and trained with RTL/Gate-Level power simulations using variety of power vectors to capture different instruction usage for more accurate power estimation. The trained power model reflects each instruction’s contribution on power consumption.
IPM estimates whole application power by analyzing workload of each AI Engine core with instruction-level pipeline information and memory accesses. IPM also generates cycle-by-cycle resolution report up to milliseconds. IPM demonstrates that power prediction error rate is average 5%-10% to silicon power measured in real application use-cases.
Designers further utilize the IPM cycle-by-cycle current profile to budget/design Power Delivery Network (PDN) by identifying peak power and potential power step-load events in real application.