Presentation
RISC-V: Open and Flexible, but still a Standard? How well has RISC-V performed as an open standard ISA that encourages innovation without chaos and fragmentation?
TimeWednesday, July 13th1:30pm - 3pm PDT
Location2012, Level 2
Event Type
Engineering Tracks
IP
IP
RISC-V
Organizer
DescriptionThe RISC-V ISA was born out of academic research in 2010. Today, there are many commercial and open-source vendors of RISC-V IP, hardware and software. Many semiconductor and systems companies have deployed RISC-V based processors ranging from tiny microcontrollers to data center server class designs. The factors driving this unprecedented interest in RISC-V include the promise of lower total cost of ownership and the availability of hardware from multiple vendors providing solutions across the area/performance/energy curve. The ability of customers to add their custom ISA extensions, the promise of software portability between different implementations and the availability of software development tools from multiple independent vendors, including open-source developers, are addition attractions of RISC-V. But have the promises of RISC-V panned out for commercial users of RISC-V IP cores in actual deployments? Is there a lower total cost of ownership? Has anyone had a “seamless” software porting experience across HW/IP suppliers? Is the software development ecosystem demonstrably better than other ISAs? The panel will discuss the current state of the RISC-V ecosystem from the perspectives of hardware and software IP vendors as well as users/customers.