Efficient use of on-line LogicBIST to achieve ASIL B in a GPU IP
TimeTuesday, July 12th2:00pm - 2:15pm PDT
Location2012, Level 2
DescriptionWith the increased use of complex IP within automotive IC applications, it is vitally important that commercial IP is delivered fit for purpose. To ensure that this GPU IP can achieve the required ISO26262 certification, a full reference architecture was created which implements periodic LogicBIST controlled by an on-chip safety manager. This paper steps through the compete architecture giving details on the Infrastructure used to monitor and manage the BIST based safety mechanisms in an in-life periodic configuration including the complex scheduling required to meet the specified DTI. We also review the process to certify the complete IP to ISO26262.