A 28nm Full-Digital Processing in Memory System for Ultra-High-Efficiency Applications
TimeTuesday, July 12th2:30pm - 2:45pm PDT
Location2012, Level 2
Event Type
Engineering Tracks
DescriptionIn the era of AI, battery-powered edge computing devices stand in need of high-efficiency and low-power solutions to perform demanding cognitive tasks. Processing-in-memory (PIM) technology has been considered as one of the most promising solutions for AIoT applications due to its inherent advantages, including low latency, high throughput and extremely high-power efficiency. Previous PIM works largely count on analog circuits such as analog digital converter (ADC) to perform Vector Matrix Multiplication (VMM). However, those designs trade ADC accuracy with extra power and die area. In this work, we present a fully digital SRAM-based PIM design, where ADC is not required and, thus, higher density achieved. Furthermore, we propose system-level low-power strategies to sustain the high efficiency provided by PIM. We demonstrate that the proposed system increases the computing efficiency by one magnitude compared to state-of-the-art deep learning inference solutions.