Tackling Trust through Verification and Assessment: Wishful Thinking or Inevitable Reality?
TimeTuesday, July 12th1:30pm - 3pm PDT
Location3001, Level 3
DescriptionMicroelectronics trust assurance challenges have transformed over the last decade, with exploitable vulnerabilities arising from explosion in design complexity one the one hand, and dependency on an increasingly complex, global supply chain on the other. The research community has been developing increasingly sophisticated mitigation technologies in response, ranging from architecture to physical design, packaging, and fabrication strategies. An obvious upshot is that it is now more difficult than ever to develop objective technologies for assessing the security of a finished product. Furthermore, security does not come for free. The additional complexity introduced for security has ramifications to functional correctness, performance, energy consumption, etc., all of which need to be accounted for in verification. This panel will examine the crucial challenge of security assessment and verification of modern
microelectronics systems under the evolving zero-trust model. Current practices, their strengths and limitations in the new security ecosystem, emergent approaches to address these limitations will be discussed.