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Presentation

SWIM: Selective Write-Verify for Computing-in-Memory Neural Accelerators
TimeTuesday, July 12th5:06pm - 5:30pm PDT
Location3002, Level 3
Event Type
Research Manuscript
Keywords
AI/ML Design: Circuits and Architecture
Topics
Design
DescriptionNon-volatile emerging device-based Compute-in-Memory (nvCiM) technique is a promising engine for Deep Neural Networks (DNNs) acceleration thanks to its high energy efficiency. However, the robustness of emerging devices hinders the advance of nvCiM platforms. The write-verify technique can improve accuracy for models mapped to such platforms but requires great programming time. In this work, we introduce a second derivative-based weight selection technique so that only a small portion of the weights in a certain DNN needs to be written-verified. We achieve 10x speedup in LeNet for MNIST compared with vanilla write-verify and preserved a comparable accuracy.