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Presentation

Accurate Timing Prediction at Placement Stage with Look-Ahead RC Network
TimeThursday, July 14th3:50pm - 4:10pm PDT
Location3007, Level 3
Event Type
Research Manuscript
Keywords
Timing and Low Power Design
Topics
EDA
DescriptionTiming closure is essential in IC design. In placement stage, a fast and accurate timing estimator, which can highly correlate with a sign-off timer, is desirable to guide timing optimization. In this paper, to handle timing uncertainty at the placement stage, we integrate a fast routing analyzer to build a look-ahead RC network, and extract fully timing features using our look-ahead RC network. A net-based delay model for timing pessimism reduction is explored based on machine learning algorithm. Experimental results show that our timing predictor is very close to the post-routing sign-off result with more than 0.99 correlation.