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Presentation

GATSPI: GPU Accelerated Gate-Level Simulation for Power Improvement
TimeThursday, July 14th4:50pm - 5:10pm PDT
Location3007, Level 3
Event Type
Research Manuscript
Keywords
Timing and Low Power Design
Topics
EDA
DescriptionThis work presents GATSPI, a novel GPU accelerated logic gate simulator that enables ultra-fast power estimation for industrial designs. GATSPI is written in PyTorch with custom CUDA kernels for ease of coding, and accomplishes 28-1198X simulation speedup when compared to an industrial simulator. GATSPI produces industry standard SAIF files from inertial-delay-filtering gate-level simulation. Compared to prior art, GATSPI supports all cell types and SDF conditional delay statements, without requiring calibration runs. GPU profiling results show GATSPI scales well with future GPU architectures. GATSPI validates 1.4% glitch power savings at 449X speedup when deployed in a glitch-fixing power optimization flow.