HCG: Optimizing Embedded Code Generation of Simulink with SIMD Instruction Synthesis
TimeThursday, July 14th1:53pm - 2:15pm PDT
Location3004, Level 3
Event Type
Research Manuscript
Embedded Software
Embedded Systems
DescriptionIn this paper, we propose HCG, an optimized code generatorfor the Simulink model with SIMD instruction synthesis. It will synthesize the optimal implementation for those intensive computing actors based on the pre-calculation of the input-scales adaptively, and for those batch computing actors according to the dataflow graph mapping. We implemented HCG and evaluated its performance on some benchmark models. Compared to the build-in Simulink Coder and the most-recent DFSynth, the code generated by HCG achieve an improvement of 38.9%-92.9% and 41.2%-76.8% in terms of execution time across different architectures and compilers, respectively.