GraphRing: An HMC-Ring based Graph Processing Framework with Optimized Data Movement
TimeThursday, July 14th2:15pm - 2:37pm PDT
Location3005, Level 3
SoC, Heterogeneous, and Reconfigurable Architectures
DescriptionIn recent years, the development of processing-in-memory technique such as hybrid memory cube has provided a feasible design direction for graph processing accelerators. Although processing-in-memory system can provide high internal bandwidth, memory access across nodes is inevitable in large-scale graph processing tasks, which will greatly affect the overall performance of the system. In this paper, we propose a graph processing architecture, GraphRing. We eliminate the overhead of cross-node memory access by changing the execution flow and the connection of HMCs. The evaluation results show that GraphRing achieves on average 1.5x speedup and 85\% communication energy saving.