PIPF-DRAM: Processing in Precharge-Free DRAM
TimeThursday, July 14th1:30pm - 1:53pm PDT
Location3002, Level 3
Event Type
Research Manuscript
In-memory and Near-memory Computing
DescriptionThe memory-wall is a blocking issue in throughput and power consumption of high-performance computing to embedded systems.
To reduce costly data communication between processor and memory, parallel processing-in-memory (PIM) is a promising approach to exploit huge in-memory bandwidth.
High capacity, large row activation size, and maturity of DRAM, make the PIM very alluring in DRAM. However, the dense layout, and high process variation and noise vulnerability of DRAMs makes PIM very challenging to be inserted in DRAMs in the real-world.
This work proposes a PIM technique using a precharge-free DRAM (PF-DRAM) structure which eliminates these limitations.