Pref-X: A Framework to Reveal Data Prefetching in Commercial In-Order Cores
TimeThursday, July 14th1:30pm - 1:53pm PDT
Location3005, Level 3
SoC, Heterogeneous, and Reconfigurable Architectures
DescriptionThe behavior of key components in existing processors is often not disclosed, complicating the construction of faithful simulation models. The data prefetching engine is one of such obscured components which can have a significant impact in performance. In this paper, we propose Pref-X, a framework to analyze functional characteristics of data prefetching in commercial in-order cores.
Our framework reveals data prefetches by X-raying into the cache memory at per-cycle granularity, which allows linking memory access patterns with changes in the cache content. We use Pref-X to replicate the data prefetching mechanisms of the Arm Cortex-A7 and Cortex-A53 cores.