Mixed-granularity Parallel Coarse-grained Reconfigurable Architecture
TimeTuesday, July 12th5:10pm - 5:30pm PDT
Location3005, Level 3
Event Type
Research Manuscript
SoC, Heterogeneous, and Reconfigurable Architectures
DescriptionCoarse-Grained Reconfigurable Architecture (CGRA) is a high-performance computing architecture. However, the coarse granularity limits CGRA's parallelism to Processing Element(PE) level. Many operators and channels unused cause low utilization and performance. Our goal is to design a CGRA, which has fine-grained operator and channel parallelism, while maintaining coarse-grained Reconfigurability. We design an execution model with capability of parallel PE operators excution and parallel channel data transmission, together with a general vectorization approach. Finally, a fine-grained parallel CGRA: FP-CGRA is developed and evaluated with machsuite. Compared with baseline-CGRA, FP-CGRA has achieved a 2.0x utilization improvement and a 1.81x performance per area improvement.