SRA: A Secure ReRAM-Based DNN Accelerator
TimeTuesday, July 12th3:54pm - 4:18pm PDT
Location3006, Level 3
DescriptionMany Deep Neural Network (DNN) accelerators have been developed to achieve more efficient DNN computing.
The security of such accelerators remains a less-addressed problem.
In this paper, we propose the first solution to address the above issue on ReRAM-based DNN accelerators.
Our proposed technique could protect both the models weights deployed on ReRAM devices and the intermediate results produced between layers.
We use Stochastic Computing (SC) to protect intermediate results when they are written back off-chip.
We use the 1T4R ReRAM crossbar to separate a long SC bit stream into segments, and recombine them to form different weight values.