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Presentation

Improving Compute In-Memory ECC Reliability with Successive Correction
TimeWednesday, July 13th3:54pm - 4:18pm PDT
Location3002, Level 3
Event Type
Research Manuscript
Keywords
Emerging Device Technologies
Topics
Design
DescriptionCompute in-memory is an exciting technique that minimizes data transport, maximizes memory throughput, and performs computation on the bitline of memory sub-arrays. This is especially interesting for machine learning applications, where increased memory bandwidth and analog domain computation offer improved area and energy efficiency. In this work, we explore the impact of device variation (calibrated with measured data) and propose a new class of ECC for CIM. We demonstrate single, double, and triple error correction offering up to 16,000x reduction in BER over no ECC and over 33x over prior work, while consuming only 29.1% area and 26.3% power overhead.