Statistical Computing Framework and Demonstration for In-memory Computing Systems
TimeThursday, July 14th10:30am - 10:52am PDT
Location3002, Level 3
In-memory and Near-memory Computing
DescriptionThis work demonstrates a statistical computing framework for energy/throughput-aggressive AI systems based on in-memory computing (IMC). IMC employs highly-parallel analog operation capable of exploiting nanoscale memory technologies to increase efficiency and speed at the cost of SNR. The framework consists of efficient and scalable modeling of hardware noise, as well as progressive and contrastive (PC) stochastic training for maintaining network accuracy. Noise-model parameters are measured from a small number of hardware measurements, and accuracy is maintained for high-level computations composed from the underlying hardware. The framework is demonstrated on a fabricated MRAM-based IMC prototype in 22nm CMOS, performing CIFAR-10/100 classification.