Hammer: A Modular and Reusable Physical Design Flow Tool
TimeWednesday, July 13th1:30pm - 2pm PDT
Location3003, Level 3
Event Type
Special Session (Research)
DescriptionProcess technology scaling and hardware architecture specialization has vastly increased the difficulty and expense of optimizing for power, performance, and area in chip design. Hammer is an open-source, reusable physical design flow generator that reduces design effort by enforcing a separation between design-, tool-, and process technology-specific concerns with a modular software architecture. In this work, we outline Hammer’s structure and highlight recent extensions that support both physical chip designers and hardware architects evaluating the merit, feasibility and tradeoffs of their proposed designs. This is accomplished through the integration of more tools and process technologies—some open-source—and the designer-driven development of flow step generators. An evaluation of chip designs in process technologies ranging from 130nm down to 12nm shows how Hammer-generated flows are reusable and enable efficient optimization across a set of RISC-V chips for diverse applications.