Secure by Construction: Addressing Security Vulnerabilities Introduced During High-level Synthesis
TimeThursday, July 14th3:30pm - 4pm PDT
Location3003, Level 3
Special Session (Research)
DescriptionMoving towards a higher level of abstraction (C/C++) enables designers to implement and validate complex designs faster in response to aggressive time-to-market requirements. High-Level Synthesis (HLS) is an automatic process that translates the high-level description of the design behaviors into the corresponding Hardware Description Language (HDL) modules. However, HLS translation steps/optimizations can cause security vulnerabilities. It is very important that HLS generates functionally correct RTL in a secure manner in the first place since it is not easy to read the automatically generated codes and trace them back to the source of vulnerabilities. Even if one manages to identify and fix the security vulnerabilities in one design, the core of the HLS engine remains vulnerable. Therefore, the same vulnerabilities will appear in all other HLS generated RTL codes. This talk shows an automatic and systematic approach for identifying and mitigating the security vulnerabilities introduced during HLS.