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Presentation

HPVM2FPGA: Enabling True Hardware-Agnostic FPGA Programming
TimeTuesday, July 12th6pm - 7pm PDT
LocationLevel 2 Lobby
Event Type
Networking Reception
Work-in-Progress Poster
DescriptionCurrent FPGA programming tools require extensive
hardware-specific manual code tuning to achieve performance,
which is intractable for most software application teams. We
present HPVM2FPGA, a novel end-to-end compiler and auto-
tuning system that can automatically tune hardware-agnostic
programs for FPGAs. HPVM2FPGA uses a hardware-agnostic
abstraction of parallelism as an intermediate representation
(IR) to represent hardware-agnostic programs. HPVM2FPGA’s
powerful optimization framework uses sophisticated compiler
optimizations and design space exploration (DSE) to automatically tune a hardware-agnostic program for a given FPGA.
HPVM2FPGA is able to support software programmers by shifting the burden of performing hardware-specific optimizations to
the compiler and DSE. We show that HPVM2FPGA can achieve
up to 33× speedup compared to unoptimized baselines and can
match the performance of hand-tuned HLS code for three of four
benchmarks. We have designed HPVM2FPGA to be a modular
and extensible framework, and we expect it to match hand-tuned code for most programs as the system matures with more
optimizations. Overall, we believe that it constitutes a solid step
closer to fully hardware-agnostic FPGA programming, making
it a suitable cornerstone for future FPGA compiler research.