AI/ML Driven Self-adaptive Design Methodology for Analog Circuits
TimeTuesday, July 12th6pm - 7pm PDT
LocationLevel 2 Lobby
DescriptionWith scaled technology as geometry, supply shrinks in, analog functions are more demanding in performance, power, and complexity. The legacy manual analog circuit design process become error prone. We present a design and methodology of analog and mixed signal ICs that automatically re-tune in face of unpredictable results in manufacturing process (P), and on-the-fly changes in voltage (V) and temperature (T). An embedded ML model is trained by simulations to predict the characteristics for each encountered set of PVT. It infers tuning should be applied on-the-fly to return chip’s electrical characteristics to nominal values defined in design specification.