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Presentation

Bit-FLEX: an Energy-Efficient Analog-Digital Hybrid DNN Accelerator with Bit-Level Flexible Scalability
TimeTuesday, July 12th6pm - 7pm PDT
LocationLevel 2 Lobby
Event Type
Networking Reception
Work-in-Progress Poster
DescriptionBit-precision-scalable architectures enable to efficiently optimize the energy consumption and accuracy of deep neural networks (DNNs) upon environmental conditions. However, the scalability is obtained at a significant cost of energy. We propose an analog-digital hybrid architecture to improve the energy efficiency of bit-precision-scalable architectures, named bit-FLEX. Our bit-FLEX employs analog PEs that can achieve high energy efficiency with less variability than analog CIMs. By preserving intra-PE scalability, systolic-array architecture for general-purpose DNN acceleration could be employed. Compared to state-of-the-art works, our bit-FLEX delivers up to 569% enhanced energy efficiency and 4X-wider range of scalability while hardly affecting the DNN accuracy.