A Custom Macro Suite for Optimization of Neuromorphic TNN Designs in CMOS
TimeTuesday, July 12th6pm - 7pm PDT
LocationLevel 2 Lobby
DescriptionTemporal Neural Networks (TNNs) exhibit brain-like energy-efficient sensory processing capabilities. This work builds on recent TNN research, to develop highly optimized custom macros for the 7nm CMOS cell library, for direct implementation of TNNs.
The nine new macros reduce power, delay and area, by about 17%, 12%, and 27%, respectively, compared to corresponding standard cells. TNN prototypes for two applications are evaluated. With custom macros, an unsupervised time-series clustering TNN delivering competitive performance can be implemented within 40uW power and 0.05mm^2 area, while a 4-layer TNN that achieves an MNIST error rate of 1% consumes only 18mW and 24.63mm^2.