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Presentation

A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange
TimeWednesday, July 13th6pm - 7pm PDT
LocationLevel 2 Lobby
Event Type
Networking Reception
Work-in-Progress Poster
DescriptionWe propose a compact, unified and instruction-set cryptoprocessor for performing both lattice-based digital signature (Crystals-Dilithium) and key exchange (Saber). The implementation leverages from algorithmic and structural synergies in the two schemes to realize a unified high-speed post-quantum key-exchange and digital signature engine within a compact area.

On a Xilinx Ultrascale+ FPGA, the cryptoprocessor consumes 18,040 LUTs, 9,101 flip-flops, 4 DSPs, and 14.5BRAMs. It meets 200 MHz clock frequency and finishes CCA-secure key-generation, encapsulation, and decapsulation operations for Saber in 54.9, 72.5 and 94.7μs, respectively. For Dilithium-II, key-generation, signing, and verification take 78.0, 164.8 and 88.5μs, respectively, for the best-case scenario.