Aggressive Performance Improvement on PIM Devices by Adopting Hugepages
TimeWednesday, July 13th6pm - 7pm PDT
LocationLevel 2 Lobby
DescriptionProcessing-in-Memory (PIM) devices integrated into general-purpose systems demand virtual memory support. Such accelerators intend to exploit higher memory bandwidth by accessing a large amount of data through vector operations. Therefore, PIM can suffer severe penalties due to the high cost of page misses in the Translation Lookaside Buffer. Our study demonstrates the criticality of such penalties on the system's performance and that PIM must resort to large page sizes. The presented results exploit the native large pages available on the host, and they show that one can extract substantial performance improvements (84x) for wide-vector PIM operations with large pages.