SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
TimeWednesday, July 13th6pm - 7pm PDT
LocationLevel 2 Lobby
Event Type
Networking Reception
Work-in-Progress Poster
DescriptionTo meet the growing need for computational power of DNN, multiple specialized hardware architectures have been proposed. Each DNN layer should be mapped onto the hardware with the most efficient schedule. Previous work has shown the importance of scheduling optimization, however, SotA schedulers cannot consistently provide optimum schedules in a reasonable time across all DNN-HW combinations.

This paper proposes SALSA, a rapid dual-engine scheduler to generate near-optimum temporal mappings without constraining the design space. SALSA uses a simulated annealing strategy to guide the search, yielding near-optimum mappings across DNNs and HW topologies. SALSA is extensively compared against the SotA schedulers.