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Presentation

Fast In-Memory Floating-Point Addition
TimeWednesday, July 13th6pm - 7pm PDT
LocationLevel 2 Lobby
Event Type
Networking Reception
Work-in-Progress Poster
DescriptionDigital processing-in-memory (PIM) is rapidly emerging as a solution to the memory-wall bottleneck which vastly accelerates data-intensive applications. PIM enables massive bit-wise parallelism within memory devices and is best suited for vectored dataflow instructions. Unfortunately, floating-point addition inherently requires complex control mechanisms for alignment and normalization. Thus, previous works considered in-memory floating-point addition impossible, thereby not supporting the numerous applications that require floating-point accuracy. This paper overcomes that limitation by utilizing in-memory multiplexers and a logarithmic-shifter approach to convert the control-flow to data-flow, thereby providing the first in-memory floating-point addition algorithm. Crucially, our algorithm does not require any additional periphery and is directly applicable to the many different forms of PIM (e.g., DRAM, memristive stateful logic). As a case study, using memristive stateful logic, we demonstrate memory-intensive vector addition with 330× greater throughput and 305× better energy than GPU.