Presenter Full Program · Contributors · Organizations · Search Program · My Agenda · Happening NowMore…Search ProgramMy AgendaHappening NowParag UpadhyayIntelPresentationsEngineering Track PosterEngineering TracksMitigation of Soft-Errors in Storage Elements through Layout and Circuit Design TechniquesAIBack-End DesignCloudEmbedded SystemsFront-End DesignIP