Research Manuscript: Accelerating the Inference: Transformers, Graphs and Others
Event TypeResearch Manuscript
AI/ML Design: Circuits and Architecture
TimeWednesday, July 13th1:30pm - 3:00pm PDT
Location3002, Level 3
DescriptionThis session presents novel accelerators for neural inference. The papers presented target accelerators of graph neural networks and transformer networks among others. Further, one accelerator focuses on diagonal matrix multiplication, used in sparse self-attention heads. All papers present various trade-offs and demonstrate significant progress against the state of the art.