Session
Resist Faults and Make Memories Smarter
Event TypeResearch Manuscript
In-memory and Near-memory Computing
Design
TimeThursday, July 14th10:30am - 12:00pm PDT
Location3002, Level 3
DescriptionResistive RAM based In-Memory Computing offers a promising path to break the von-Neumann bottleneck. This session pushes the frontiers in this novel computing paradigm by exploring algorithmic techniques to address fundamental challenges related to noise and fault tolerance. Application-hardware co-design demonstrates the potential of such In-Memory computing platforms for graph based vector search and string processing applications.
Presentations
| 10:30am - 10:52am PDT | Statistical Computing Framework and Demonstration for In-memory Computing Systems | |
| 10:52am - 11:15am PDT | Write or Not: Programming Scheme Optimization for RRAM-based Neuromorphic Computing | |
| 11:15am - 11:37am PDT | ReSMA: Accelerating Approximate String Matching Using ReRAM-based Content Addressable Memory | |
| 11:37am - 12:00pm PDT | VStore: In-Storage Graph Based Vector Search Accelerator |


