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Session

Research Manuscript: Resist Faults and Make Memories Smarter
Event TypeResearch Manuscript
Keywords
In-memory and Near-memory Computing
Topics
Design
TimeThursday, July 14th10:30am - 12:00pm PDT
Location3002, Level 3
DescriptionResistive RAM based In-Memory Computing offers a promising path to break the von-Neumann bottleneck. This session pushes the frontiers in this novel computing paradigm by exploring algorithmic techniques to address fundamental challenges related to noise and fault tolerance. Application-hardware co-design demonstrates the potential of such In-Memory computing platforms for graph based vector search and string processing applications.