Close
 

Session

Back-End Design, Engineering Tracks: Pathways to Realizations
Session Chair
Lakshmanan Balasubramanian
Texas Instruments (India) Pvt. Ltd.
IEEE
Event TypeBack-End Design, Engineering Tracks
Topics
AI
Back-End Design
TimeMonday, July 11th1:30pm - 3:00pm PDT
Location2008, Level 2
Presentations
1:30pm - 1:45pm PDTRouting Congestion Prediction with Machine Learning in Physical Synthesis
Presenters
Kaylee Trevino
nancy Zhou
Mike Kazda
Lakshmi Reddy
Alex Suess
William Dougherty
Hua Xiang
1:45pm - 2:00pm PDTRefining Tapeout: Automation for Simplicity and Accuracy
Presenters
Greg Ford
Mark Lasher
2:00pm - 2:15pm PDTImplementing QDI Design with Conventional Synchronous Design Flow: A Case of Long Distance Interconnect across Voltage Domain
Presenters
Kyungmin Lee
Sungmoon Kang
Yongsang Yu
Manhwee Jo
Wooil Kim
2:15pm - 2:30pm PDTIntelligent Floorplanning (IFP)
Presenters
Mithil Shah
Krunal Agrawal
Srivatsa rangachar srinivasa
2:30pm - 2:45pm PDTPower Aware Scan Structure Planner
Presenters
Chen Yuan Kao
Sin Huei Li
Chien Chen Wu
Min Hsiu Tsai
2:45pm - 3:00pm PDTDesign Rule Decision Methodology For Balancing Process Limit and Routability Improvement
Presenters
Seunghwan Song
Jooyeon Kwon
Sangdo Park
Hyung-Ock Kim
Sangyun Kim