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Networking Reception, Work-in-Progress Poster: Networking Reception & Work-In-Progress Poster Session

Event TypeNetworking Reception, Work-in-Progress Poster

TimeWednesday, July 13th6:00pm - 7:00pm PDT

LocationLevel 2 Lobby

Presentations

Aggressive Performance Improvement on PIM Devices by Adopting Hugepages Authors Paulo Cesar Santos Bruno Endres Forlin Augusto Exenberger Becker Marco Antonio Zanata Alves Luigi Carro
Agile: A Collaborative Air-ground IoT Edge Framework for Sustainable Remote Monitoring Authors Wen Zhang Chen Pan Yanzhi Wang Wenlu Wang Mehdi Sookhak Mimi Xie
Aging-aware Critical Path Selection via Graph Attentional Networks Authors Yuyang Ye Tinghuan Chen Jingyu Yang Yifei Gao Hao Yan Bei Yu Longxing Shi
Aging-aware memristor for reliable and energy-efficient Deep Learning Acceleration Authors Dharanidhar Dang Aurosmita Khansama Rabi N. Mahapatra Bill Lin Debashis Sahoo
Ambient Temperature Estimation using Neural Networks and Device Contextual Information Authors Aditya Jhawar Aditi Jaiswal Nikhil Sahni Vaisakh Chirayil S B Renju Nair
AMBITION: Ambient Temperature Aware VM Allocation for Energy Efficient Edge Data Centers Authors Seung Hun Choi Seon Young Kim Young Geun Kim Joonho Kong Sung Woo Chung
Attacking the TimingCamouflage+ Algorithm Authors Priya Mittu Yuntao Liu Abhishek Chakraborty Ankur Srivastava
Automatic Generation of Cell Based structured CIM Macros Authors Christian Lanius Jie Lou Tobias Gemmeke
Automation of Functional Safety and Security Methods for Design and Verification Authors Nikita Gulliya Freddy Nunez Neena Chandawale
AutoPilot: Compute Design Automation for Autonomous Drones Authors Srivatsan Krishnan Zishen Wan Kshitij Bhardwaj Paul Whatmough Aleksandra Faust Sabrina Neuman Gu-Yeon Wei David Brooks Vijay Janapa Reddi
Bounded BaT: Bounded Backup Time for Intermittent Power Devices Authors SatyaJaswanth Badri Mukesh Saini Neeraj Goel
A Built-In Adaptive NDA for High-Level Language Acceleration Authors Rafael Fão de Moura Joao Paulo Lima Luigi Carro
CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs Authors Shvetank Prakash Tim Callahan Joseph Bushagour Colby Banbury Alan Green Pete Warden Tim Ansell Vijay Janapa Reddi
Constructing Large Buffers with HeterogeneousSTT-RAM Cells for DNN Accelerators Authors Yongjun Kim Kwangeun Byun Seokin Hong
A Coq Framework for More Trustworthy DRAM Controllers Authors Felipe Lisboa Malaquias Florian Brandner Mihail Asavoae Lirida Naviner
Deep Reinforcement Learning Empowered Content Caching in Mobile Social Networks Authors Keke Gai Ziyue Hu Meikang Qiu Liehuang Zhu
Design Space Exploration of Streaming Implementations of CNNs on the Xilinx AIEngine Processor Array Authors Louis Coulon Kristof Denolf Stephen Neuendorffer Jack Lo Paolo Ienne Kees Vissers
A Domain-Specific System-On-Chip Design for Energy Efficient Wearable Edge AI Applications Authors Yigit Tuncel Anish Krishnakumar Aishwarya Chithra Younghyun Kim Umit Ogras
DVFS Virtualization for Energy Minimization of Mixed-Criticality Dual-OS Platforms Authors Takumi Komori Yutaka Masuda Tohru Ishihara
An Efficient Analog Convolutional Neural Network Hardware Accelerator Enabled by a Novel Memoryless Architecture for Insect-Sized Robots Authors Iman Dadras Mohammad Hasani Ahmadilivani Saoni Banerji Jaan Raik Alvo Aabloo
Efficient Scheduling of Synchronous Dataflow Graphs on Communication Cost-Aware Heterogeneous Platforms Authors Pengfei Sun Xue-Yang Zhu
An Energy-Efficient Multi-bitwidth Systolic ReRAM Accelerator for NAS Optimized CNN Networks Authors Dingbang Liu Haoxiang Zhou Jun Liu Changhai Man Mingqiang Huang Wei Mao Shaobo Luo Mingsong Lv Quan Chen Hao Yu
Equivalence Checking for Agile Hardware Design Authors Yanzhao Wang Fei Xie Zhenkun Yang Pasquale Cocchini Jin Yang
Error Distribution Modeling for Behavior-level Approximate Computing Authors Lakshmi Sathidevi Abhinav Sharma Nan Wu Xun Jiao Cong Hao
FPGNN-ATPG: An Efficient Fault Parallel Automatic Test Pattern Generator Authors Yuyang Ye Zonghui Wang Luoyu Mei Ziqi Wang Hao Yan Longxing Shi
Hybrid Graph Models for Logic Optimization via Spatio-Temporal Information Authors Nan Wu You-Young Lee Yuan Xie Cong Hao
Improving GPU Performance via Coordinated Kernel Slicing and Multi CUDA Streaming Authors Zhuo Tang Bingting Jiang Yaohua Wang Yunchun Liu Kenli Li
Instant Data Sanitization on Multi-Level-Cell NAND Flash Memory Authors Md Raquibuzzaman Matchima Buddhanoy Aleksandar Milenkovic Biswajit Ray
Instruction-aware Learning-based Timing Error Models through Significance-driven Approximations Authors Styliani Tompazi Ioannis Tsiokanos Jesus Martinez del Rincon Lev Mukhanov Georgios Karakonstantis
LDAVPM: A Latch Design with Algorithm-based Verification Protected against Multiple-Node-Upsets in Harsh Radiation Environments Authors Aibin Yan Zhixing Li Qi Wang Jie Cui Tianming Ni Zhengfeng Huang Xiaoqing Wen Patrick Girard
Leveraging Layout-based Effects for Locking Analog ICs Authors Muayad Aljafar Florence Azaïs Marie-Lise Flottes Samuel Pagliarini
A method for hierarchical, transistor-level circuit simulation Author Henry Cao
ML-Assisted Vmin Binning with Multiple Guard Bands for Low Power Consumption Authors Wei-Chen Lin Chun Chen Chao-Ho Hsieh Cheng-Yun Hsieh James Li Eric Fang Sung Hsueh
A Model-Based Evaluation Framework for Battery Cell Balancing Techniques Authors Seongik Jang Hoeseok Yang
Modular software for real-time quantum control systems Authors Leon Riesebos Brad Bondurant Jacob Whitlow Junki Kim Mark Kuzyk Tianyi Chen Samuel Phiri Jungsang Kim Kenneth Brown
On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster Authors Michael Rogenmoser Nils Wistoff Pirmin Vogel Frank Gurkaynak Luca Benini
A Page-mapping Consistency Protecting Method for Soft Error Damage in Flash-based Storage Authors Jung-Hoon Kim Young-Sik Lee
Performance Impact of Inter-PIM Communication Authors Bruno Endres Forlin Paulo Cesar Santos Augusto Exenberger Becker Marco Antonio Zanata Alves Luigi Carro
Powering Multi-Task Federated Learning with Competitive GPU Resource Sharing Authors Yongbo Yu Fuxun Yu Zirui Xu Di Wang Minjia Zhang Ang Li Shawn Bray Chenchen Liu Xiang Chen
PRIME: A PRocessing In Memory HardwareEmulation Framework Authors Andrew Dervay Wenfeng Zhao
Qualification of Metamorphic Relations for System Level AMS Models using Data Flow Coverage Authors Muhammad Hassan Rolf Drechsler
Real-time, personalized prediction of sepsis onset using fusion of electronic medical records and in-sensor analog classifier Authors Sudarsan Sadasivuni Monjoy Saha Sumukh Prashant Bhanushali Imon Banerjee Arindam Sanyal
A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration Authors Alessandro Ottaviano Giovanni Bambini Robert Balas Corrado Bonfanti Antonio Mastrandrea Luca Benini Simone Benatti Davide Rossi Andrea Bartolini
RiscyROP: Automated Return-Oriented Programming Attacks on RISC-V and ARM64 Authors Tobias Cloosters Oussama Draissi Patrick Jauernig David Paaßen Emmanuel Stapf Jianqiang Wang Lucas Davi Ahmad-Reza Sadeghi
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators Authors Victor Jung Arne Symons Linyan Mei Marian Verhelst
Self-Organizing and Parallel-Process Driven Fast Generation of Adversarial Examples for 3D Point Clouds Authors Wei Jiang Chen Bian Jinyu Zhan Zhenyu Liu Hong Lei Ziwei Song Xiangyu Wen
SoC Platform for Heterogeneous Multiple IP Core Evaluation Authors Atsushi Hasegawa Ichiro Naka Shinichi Ouchi Tadahiko Shimazu Makoto Ikeda
Soft Tiles: capturing physical implementation flexibility for tightly-coupled parallel processing clusters Authors Gianna Paulin Matheus Cavalcante Paul Scheffler Luca Bertaccini Yichao Zhang Frank Gurkaynak Luca Benini
System-Level Design and Target Agnostic High-Level Optimizations for HLS Authors Nicolas Bohm Agostini Serena Curzel Vinay Amatya Marco Minutoli Cheng Tan Vito Giovanni Castellana Joseph Manzano David Kaeli Antonino Tumeo
Thermal and Signaling Considerations for 2.5D Integration of Arm-based 7nm High-Performance Systems Authors Ankit Kaul Rahul Mathur Lingjun Zhu Muhannad Bakir Jim Dodrill
Too Big to Fail? Active Few-shot Learning Guided Logic Synthesis Authors Animesh Basak Chowdhury Benjamin Tan Ramesh Karri Siddharth Garg
Transformed Data and Faster-SPDZ : Techniques for Privacy-Preserving Deep Learning in Real-World Applications Authors Shubham Jain Aditya Jhawar Sharmila Mani Nikhil Sahni
A Unified Cryptoprocessor for Lattice-based Signature and Key-exchange Authors Aikata . Ahmet Can Mert David Jacquemin Amitabh Das Donald Matthews Santosh Ghosh Sujoy Sinha Roy
Vector In Memory Architecture for simple and high efficiency computing Authors Marco Antonio Zanata Alves Sairo Santos Aline Cordeiro Francis Moreira Paulo Cesar Santos Luigi Carro
What Helper Data Really Leaks: A Practical Approach to Estimate the Min-Entropy in PUFs Using Their Response Mass Function Authors Christoph Frisch Florian Wilde Thomas Holzner Michael Pehl
Fast In-Memory Floating-Point Addition Authors Orian Leitersdorf Ronny Ronen Shahar Kvatinsky
A Reinforcement Learning based Global Router Authors Upma Gandhi Ismail Bustany Mathew Taylor Erfan Aghaeekiasaraee Laleh Behjat