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Networking Reception, Work-in-Progress Poster: Networking Reception & Work-In-Progress Poster Session

Event TypeNetworking Reception, Work-in-Progress Poster

TimeTuesday, July 12th6:00pm - 7:00pm PDT

LocationLevel 2 Lobby

Presentations

Accelerating Data Analytics near Memory: A k-NN Search Case Study Authors Minho Ha Joonseop Sim Jungmin Choi Donguk Moon Myunghyun Rhee Taeyoung Ahn Byungil Koh Euicheol Lim Kyoung Park
Adaptive Sparsity-Aware Cloud Offloading for Edge DNN Inference Authors Marina Neseem Abdelrahman Hosny Sherief Reda
Addressing Ordering Woes of PCIe with Formal Verification Authors Vedprakash Mishra Carlston Lim Zhi Feng Lee Jian Zhong Wang Anshul Jain Achutha KiranKumar V M
AI/ML Driven Self-adaptive Design Methodology for Analog Circuits Authors Koushik De Deepthi Amuru Abhishek Pullela Ashfakh Ali Andleeb Zahra Battu Yadav mounika kelam Ashutosh Pathy Gaurav Dixit Khanh Le Zia Abbas
Bit-FLEX: an Energy-Efficient Analog-Digital Hybrid DNN Accelerator with Bit-Level Flexible Scalability Authors Donghyeon Yi Injun Choi Gichan Yun Edward Choi Sohmyung Ha Ik Joon Chang Minkyu Je
Bridger: Fast Token Delivery in Elastic Circuits Authors Ayatallah Elakhras Andrea Guerrieri Lana Josipovic Paolo Ienne
Building Efficient Portfolio-based Hardware Model Checker via And-Inverter Graph Structure Encoding Authors Chengyu Zhang Jiayi Zhu Yihao Huang Jianwen Li Geguang Pu Moshe vardi
CharTM: An Efficient and Accurate Timing Yield Analysis Method for Memory Characterization based on Generalized Pareto Distribution Authors Liang Pang Xiao Shi longxin Shi hao yan
Circumventing Machine Learning-Based Attacks to Logic Locking Authors Yinghua Hu Subhajit Dutta Chowdhury Kaixin Yang Mustafa Munir Jatin Bollareddy Pierluigi Nuzzo
CoCo-FL: Communication- and Computation-Aware Federated Learning via Partial NN Freezing and Quantization Authors Kilian Pfeiffer Martin Rapp Ramin Khalili Joerg Henkel
A Custom Macro Suite for Optimization of Neuromorphic TNN Designs in CMOS Authors Harideep Nair Prabhu Vellaisamy Santha Bhasuthkar John Paul Shen
Deep Learning Empowered Spectrum Sensing and Access in Distributed Cognitive Radio Network Authors Keke Gai Yue Zhang Meikang Qiu Liehuang Zhu
Design Space Exploration of Mixed-Precision Hardware Accelerators for CNNs Authors Cecilia Latotzke Tim Ciesielski Tobias Gemmeke
Display Pixel Layout Design with Deep Reinforcement Learning Authors Byeong Keun Kang Hyung Joon Nam In Huh Jae Keon Bae Jeong Hyeon Choi Ki Seok Chang Woohyung Lim Il Ho Kim Seok Woo Lee Soo Young Yoon
EA-Prune: Environment Adaptive Neural Network Pruning for Low-power Energy Harvesting Devices Authors Sahidul Islam Shanglin Zhou Yueying Liang Ran Ran Yufang Jin Wujie Wen Caiwen Ding Mimi Xie
Enabling Versatile Power Management for AIoT Devices Authors Xiaofeng Hou Xuehan Tang Jiacheng Liu Chao Li Luhong Liang Tim Cheng
Endurance-Aware Deep Neural Network Real-Time Scheduling on ReRAM Accelerators Authors SHI SHA Ajinkya Bankar Xiaokun Yang Wujie Wen Gang Quan
Energy Profiling of USB DNN Accelerators Authors Matthias Wess Matvey Ivanov Nikolas Alge Christian Krieg Axel Jantsch
ES4D: Accelerating Exact Similarity Search for High-Dimensional Vectors via Vector Slicing and In-SSD Distance Calculation Authors Juhwan Kim Jong Sun Seo Jong-Hyeok Park Sang-Won Lee Hongchan Roh Hyungmin Cho
Exploring Input Data Obfuscation as a Countermeasure to Model Extraction Attacks on Deep Neural Networks Authors Brooks Olney Robert Karam
Fingerprinting Workloads for Reconfigurable Shared Accelerators Authors Parnian Mokri Mark Hempstead
FLOW-3D: Flow-Based Computing on 3D Nanoscale Crossbars with Minimal Semiperimeter Authors Sven Thijssen Sumit Jha Rickard Ewetz
FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture Authors Yingnan Zhao Ke Wang Ahmed Louri Avinash Karanth Razvan Bunescu
Graph Partitioning Approach for Fast Quantum Circuit Simulation Authors Jaekyung Im Sunghye Park Seokhyeong Kang
Heterogeneous Chiplet-based Architecture for In-Memory Acceleration of DNNs: A Big-Little Approach Authors Gokul Krishnan Sumit Mandal Chaitali Chakrabarti Jae-sun Seo Umit Ogras Yu Cao
HPVM2FPGA: Enabling True Hardware-Agnostic FPGA Programming Authors Adel Ejjeh Leon Medvinsky Aaron Councilman Hemang Nehra Suraj Sharma Vikram Adve Luigi Nardi Eriko Nurvitadhi Rob Rutenbar
Implementing Efficient, Precise N-bit Operations of TFHE on Commodity CPU-FPGA Authors Kevin Nam Hyunyoung Oh Sanghyuk Heo Hyungon Moon Yunheung Paek
Joint Resource Scheduling in Wireless Networked Control Systems with Energy Constraint Authors Vincent Chau Chenchen Fu Shu Han Song Han Minming Li Peng Wu Yingchao Zhao
Lego: Dynamic Multi-Chip-Module Resource Provision Architecture for Multi-Tenant DNNs Authors Ching-Jui Lee Yu Xuan Zhou Tsung Tai Yeh
A Linear Column-Major Capacitance Multiplier based Analog In-Memory Computing Architecture Authors Kailash Prasad Aditya Biswas Arpita Kabra Joycee Mekie
Logic Locking Based Trojans: A Friend Turns Foe Authors Yuntao Liu Aruna Jayasena Prabhat Mishra Ankur Srivastava
LogicWiSARD: Memoryless Synthesis of Weightless Neural Networks Authors Igor Miranda Zachary Susskind Aman Arora Luis Villon Rafael Katopodis Leandro Araújo Diego Dutra Priscila Lima Felipe França Lizy John Mauricio Breternitz
Mentha: Enabling Sparse-Aware Computation on Systolic Arrays Authors Minjin Tang Mei Men Yasong Cao Junzhong Shen Jianchao Yang Jiawei Fei Yang Guo Sheng Liu
Multi-Phase Clocking for Multi-Threaded Gate-Level-Pipelined Superconductive Logic Authors Xi Li Min Pan Tong Liu Peter Beerel
MuZero-guided Simulated Annealing for Nanometer Circuit Placement Authors Wei-Hao Chang Kai-En Yang Gao-Yi Chao Yu-Hsun Chen Chen-Feng Chiang Yen-Min Tsai Sau-Loong Low Chia-Shun Yeh Bun-Suan Heng Chia-Yu Tsai Chin-Tang Lai Hung-Hao Shen
Novel ML based Reconfigurable Macro Placement for SoC Design Author sudarshanam kommanaboyina
On the (in)security of Memory Protection Units Authors Michele Grisafi Mahmoud Ammar Bruno Crispo
par-gem5: Parallelizing gem5’s Atomic Mode Authors Niko Zurstraßen José Cubero-Cascante Jan Joseph Li Yichao Xie Xinghua Rainer Leupers
Physics-Consistent Thermal SPICE and Multi-Correlated Recurrent Neural Networks to Simulate Sophisticated FinFET Circuitry Authors Chia-Che Chung Tao Chou Bo-Wei Huang Hsin-Cheng Lin Chia-Jung Tsen C. W. Liu
PowerSynth 2: A High-Density and Heterogeneous Power Electronics Physical Design Automation Framework Authors Imam Al Razi Quang Le H. Alan Mantooth Yarui Peng
A Proposition for Computing System Design Automaticity and Correctness Potential Author Tage Mohammadat
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-Core MCUs through Performance-Driven Autotuning Authors Davide Nadalini Manuele Rusci Giuseppe Tagliavini Leonardo Ravaglia Luca Benini Francesco Conti
Quantum Multiple-Valued Decision Diagrams with Linear Transformations Authors Yonghong Li Hao Miao Haipeng Che Liangda Fang Quanlong Guan Huanming Zhang
RankNAS: A Differential NAS based Auto Rank Search towards Video LSTM Networks on Edge Authors Changhai Man Cheng Chang Chenchen Ding Ao Shen Hongwei Ren Ziyi Guan Yuan Cheng Shaobo Luo Hao Yu
RFR: An STT-MRAM Cache Management Scheme for Retention Failure Reduction Authors Abdollah Mohammadi Elham Cheshmikhani Hossein Asadi
Rubik’s Optical Neural Networks: Multi-task Learning with Physics-aware System and Algorithms Authors Yingjie Li Weilu Gao Cunxi Yu
A Secure Design Methodology to Prevent Targeted Trojan Insertion During Fabrication Authors Arjun Suresh Siva Nishok Dhanuskodi Daniel Holcomb
Tackling Resource Utilization in DNN Accelerators Authors Iris Uwizeyimana Natalie Enright Jerger
TrustToken, Trusted SoC solution for Non-Trusted Intellectual Property (IP)s. Authors Muhammed Kawser Ahmed Sujan Kumar Saha Joel Mandebi Mbongue Christophe Bobda
Two-level Hierarchical Cluster-Node Scheduling for Heterogeneous Datacenters Authors Wenkai Guan Cristinel Ababei
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP Authors Dake Chen Xuan Zhou Peter Beerel
X-on-X Simulation: Distributed Parallel SystemC TLM Virtual Platforms for Heterogeneous Systems Authors Lukas Jünger Simon Winther Rainer Leupers
You Already Have It: A Generator-Free Low-Precision DNN Training Framework using Stochastic Rounding Authors Geng Yuan Sung-En Chang Qing Jin Alec Lu Yanyu Li Yushu Wu Zhenglun Kong Yanyue Xie Peiyan Dong Xiaolong Ma Xulong Tang Minghai Qin Zhenman Fang Yanzhi Wang
WESCO: Weight-encoded Reliability and Security Co-design for In-memory Computing Systems Authors Jiangwei Zhang Chong Wang Yi Cai Zhenhua Zhu Donald Kline, Jr Guohao Dai Huazhong Yang Yu Wang
Neural Network Layer Assignment for Distributed Inference via Integer Programming Authors Robert Viramontes Azadeh Davoodi
AI-Driven Accelerometer-Based Bird Activity Recognition Authors Oliver Harms Janek Haberer Sukanya Morbale Olaf Lansiedel